得獎者論文名稱論文發表處指導教授
魏駿宇Don’t-Care Aware ESOP Extraction via Reduced Decomposition-Tree ExplorationDAC 2023江介宏
黃其澤BWA-NIMC: Budget-based Workload Allocation for Hybrid Near/In-Memory-ComputingDAC 2023吳安宇
杜建德First Demonstration of Monolithic Self-aligned Heterogeneous Nanosheet Channel Complementary FETs with Matched VT by Band Alignments of Individual ChannelsIEDM 2023劉致為
吳承鴻Robust Recovery Scheme for MFIS-FeFETs at Optimal Timing with Prolonged Endurance: Fast-Unipolar Pulsing (100 ns), Nearly Zero Memory Window Loss (0.02 %), and Self-Tracking Circuit DesignIEDM 2023胡璧合
李唐A 131mW 6.4Gbps 256×32 Multi-User MIMO OTFS Detector for Next-Gen Communication SystemsISSCC 2024楊家驤
朱怡蓁A Fully-Integrated Annealing Processor for Large-Scale Autonomous Navigation OptimizationISSCC 2024楊家驤
林祐丞A 26.4mW, 18.6MS/s Image Reconstruction Processor for IoT Compressive SensingSymposium on VLSI Circuits/Technology 2023楊家驤
駱奕霖A 169mW Fully-Integrated Ultrasound Imaging Processor Supporting Advanced Modes for Hand-Held DevicesSymposium on VLSI Circuits/Technology 2023楊家驤
林亮昕A 4.8mW, 800Mbps Hybrid Crypto SoC for Post-Quantum Secure Neural InterfacingSymposium on VLSI Circuits/Technology 2023楊家驤
陳昱叡First Stacked Nanosheet FeFET Featuring Memory Window of 1.8V at Record Low Write Voltage of 2V and Endurance >1E11 CyclesSymposium on VLSI Circuits/Technology 2023劉致為
趙澤夫Towards Epitaxial Ferroelectric HZO on n+-Si/Ge Substrates Achieving Record 2Pr = 84 μC/cm2 and Endurance > 1E11Symposium on VLSI Circuits/Technology 2023劉致為
邱日照First Demonstration of a-IGZO GAA Nanosheet FETs Featuring Achievable SS=61 mV/dec, Ioff<10-7uA/um, DIBL=44 mV/V, Positive VT, and Process Temp. of 300 oCSymposium on VLSI Circuits/Technology 2023劉致為
劉亦浚Extremely High-k Hf0.2Zr0.8O2 Gate Stacks Integrated into Ge0.95Si0.05 Nanowire and Nanosheet nFETs Featuring Respective Record ION per Footprint of 9200μA/μm and Record ION per Stack of 360μA at VOV=VDS=0.5VSymposium on VLSI Circuits/Technology 2023劉致為
