得獎者論文名稱論文發表處指導教授
林奕廷Novel Guiding Template and Mask Assignment for DSA-MP Hybrid LithographyUsing Multiple BCP MaterialsDAC 2019江蕙如
徐晨皓A DAG-Based Algorithm for Obstacle-Aware Topology-Matching On-Track Bus RoutingDAC 2019張耀文
黃郁翔First Stacked Ge0.88Sn0.12 pGAAFETs with Cap, LG=40nm, Compressive Strain of 3.3%, and High S/D Doping by CVD Epitaxy Featuring Record ION of 58µA at VOV=VDS= -0.5V, Record Gm,max of 172µS at VDS= -0.5V, and Low NoiseIEDM 2019劉致為
杜建德First Vertically Stacked Tensily Strained Ge0.98Si0.02 nGAAFETs with No Parasitic Channel and LG=40nm Featuring Record ION=48µA at VOV=VDS= 0.5V and Record Gm,max(µS/µm)/SSsat(mV/dec)=8.3 at VDS=0.5VIEDM 2019劉致為
吳易忠A Fully Integrated Genetic Variant Discovery SoC for Next-Generation SequencingISSCC 2020楊家驤
丁修賢A 5.25 GHz Subsampling PLL with a VCO-Phase-Noise Suppression TechniqueISSCC 2020李泰成
鍾杰A 1.5μJ/Task Path-Planning Processor for 2D/3D Autonomous Navigation of Micro RobotsISSCC 2020楊家驤
呂芳諒Record Low Contact Resistivity (4.4x10-10Ω-cm2) to Ge Using In-situ B and Sn Incorporation by CVD With Low Thermal Budget (≤400℃) and Without GaSymposium on VLSI Technology 2019劉致為
黃郁翔First Vertically Stacked, Compressively Strained, and Triangular Ge0.91Sn0.09 pGAAFETs with High ION of 19.3µA at VOV=VDS= -0.5V, Gm of 50.2µS at VDS=-0.5V and Low SSlin of 84mV/dec by CVD Epitaxy and Orientation Dependent EtchingSymposium on VLSI Technology 2019劉致為
