講師簡介

專長登山、越野跑等戶外運動，職業戶外賽事策劃人，曾參與國內外大型戶
外運動賽事，知名的包含戈壁挑戰賽、TNF100、紅牛24 小時，及國際級戶外
挑戰賽等。曾獲選深圳十佳戶外教練及特殊貢獻獎。
近年在推廣高齡體適能運動，透過運動和飲食等衛教達到健康促進的效益。
目前為台大癌醫中心、台大EMBA 門外社、永福扶輪社及多家企業特聘的體適
能教練。也與台大森林系、台灣森林保健學會和林務局等單位合作，培訓森
林療癒引導員，打造『綠色健身房』，推進全民健康的發展。
現任：
跑山幫越野跑團創辦人
台大田徑校友會理事
深圳青少年成長計劃顧問
深圳山地救援隊教練
領攀山地戶外運動學校講師
林務局森林療癒師培訓講師
台灣森林保健學會講師
台大森林系森林療癒課程客座講師
輔大企管系業師
曾任相關職務：
深圳青少年成長計劃創始人、導師
深圳登協培訓部副部長
深圳登協高山探險部部長
戶外運動相關經歷：
深圳登協戶外教練、凱樂石簽約運動員/教練、The North Face 簽約教練
內蒙、新疆、山東、雲南等地戶外教練班教練
雲南省登協戶外裁判班主教練

講題：
掌握學術研究的黃金法則：圖書館資源與AI素養

演講簡介：
這場講座將帶您掌握學術研究的黃金法則：精準運用圖書館資源，從文獻檢索、全文取得、投稿選刊，到學術倫理與AI素養，全方位提升您的研究效率與品質，讓您在學術道路上事半功倍。

講綱：

1.精準鎖定主題： 學習檢索詞策略，找到你的研究方向。
2.高效文獻檢索： 運用圖書館資料庫，快速篩選核心文獻。
3.無縫全文獲取： 認識多種管道，輕鬆讀取完整內容。
4.投稿選刊策略： 掌握期刊評估技巧，為你的論文找到最佳歸宿。
5.善用AI助手： 培養正確的AI素養，提升研究效率與品質。
6.專業諮詢服務： 了解圖書館如何成為你的學術後盾。

講題：Semiconductor Everywhere: Explore IC Design at TSMC

Semiconductors play a pivotal role in our modern digital world. Far more than mere electronic components, they are the very lifeblood of our digital existence, powering every innovation and connecting our world. At the heart of this advancement, TSMC boasts a complete and robust design team - a collective of brilliant minds meticulously crafting and optimizing every chip. The exceptional work of this team forms the cornerstone ensuring the efficient operation of all modern technological products, from smartphones to AI servers. We will briefly illustrate the complex process of IC design and how TSMC's team, through rigorous design and optimization, transforms cutting-edge technological concepts into tangible chip products.

講員：台積電 徐孟楷資深經理(DTP前瞻設計方案與技術標竿處 )

Meng-Kai Hsu received his B.S. degrees in electronics engineering and computer science from National Chiao Tung University (NCTU), Hsinchu, Taiwan, in 2007, and his Ph.D. degree from the Graduate Institute of Electronics Engineering, National Taiwan University (NTU), Taipei, Taiwan, in 2012. Dr. Hsu is currently a Department Manager in the Design Flow Development Department within the Design and Technology Platform (DTP) at Taiwan Semiconductor Manufacturing Company, Ltd. (TSMC). He is responsible for advanced technology assessment, physical design enablement, and AI/ML design methodology development. Dr. Hsu holds over 20 U.S. patents and received the Excellent Young Engineer Award from the Chinese Institute of Engineers in 2025.

[演講訊息]

Analog Design Experiments with AI

演講者：Prof. Behzad Razavi(University of California, Los Angeles )

時間：2025年09月24(三)下午4:00~5:00

地點：國立台灣大學電機二館105演講廳

本次活動有興趣可至連結報名：https://reurl.cc/E6V8KR

演講大綱﹕

With the rapid rise of AI in various fields, we naturally wonder whether it can help or even replace analog designers. As a first step in our investigation, we evaluate the present capabilities of ChatGPT and probe its conceptual understanding beyond what it can find online. We limit our study to undergraduate analog CMOS circuits, pose questions to ChatGPT, and analyze the answers that it provides. We report answers of which many are surprising, either because they are not obvious but correct or because they are obvious but incorrect. Whether or not AI  will replace analog designers in the near future will be clear by the end of the presentation.

作者簡介﹕

Behzad Razavi is Professor of Electrical Engineering at UCLA, where he conducts research on analog and RF integrated circuits. Prof. Razavi has served as an IEEE Distinguished Lecturer and published more than 200 papers and nine books. He has received nine IEEE best paper awards and six teaching and education awards, and his books have been published in seven languages. He received the IEEE Pederson Award in Solid-State Circuits and was recognized as a top author in the 50-year and 75-year histories of the IEEE International Solid-State Circuits Conference. He is a member of the US National Academy of Engineering and a fellow of the US National Academy of Inventors.

https://forms.gle/BUbCCdqsCdfbcFW46

Abstract:

Power Consumption is more and more a major issue in the design of integrated systems and circuits. The optimization of the In designs must be done in all level of design abstraction, this means in all steps of the design flow. But, we will focus on optimization at logic and physical design level. Nowadays, most circuits use much more transistors than needed. A way to reduce power consumption at physical level is to reduce the number of transistors used to implement a circuit, as leakage power is proportional to the number of transistors. It is shown a physical design approach to reduce the number of transistors needed to perform a task.  It is proposed an EDA tool set to automatically generate the physical design of any transistor network. It shows an important reduction on power, improving also reliability. A standard cell library has a limited number of logical functions, and a limited number of sizings. The lecture is target in optimization methods to reduce the number of transistors of a circuit. The methods allow the  automatic generation of any possible logical function or transistor network, and using any transistor sizing. It is included comparisons with solutions using the traditional standard cell methodology.

Bio: 

Ricardo Reis received a Bachelor degree in Electrical Engineering from Federal University of Rio Grande do Sul (UFRGS), Porto Alegre, Brazil, in 1978, and a Ph.D. degree in Microelectronics from the National Polytechnic Institute of Grenoble (INPG), France, in 1983. Doctor Honoris Causa by the University of Montpellier in 2016. He is a full professor at the Informatics Institute of Federal University of Rio Grande do Sul. His main research includes physical design automation, design methodologies, fault tolerant systems and microelectronics education. He has more than 700 publications including books, journals and conference proceedings. He was vice-president of IFIP (International Federation for Information Processing) and he was also president of the Brazilian Computer Society (two terms) and vice-president of the Brazilian Microelectronics Society. He is an active member of CASS and he received the 2015 IEEE CASS Meritorious Service Award. He was vice-president of CASS for two terms (2008/2011). He is the founder of the Rio Grande do Sul CAS Chapter, which got the World CASS Chapter of The Year Award 2011, 2012, 2018 and 2022, and R9 Chapter of The Year 2013, 2014, 2016, 2017 and 2020. He is a founder of several conferences like SBCCI and LASCAS, the CASS Flagship Conference in Region 9. He was the General or Program Chair of several conferences like IEEE ISVLSI, SBCCI, IFIP VLSI-SoC, ICECS, PATMOS. Ricardo was the Chair of the IFIP/IEEE VLSI-SoC Steering Committee, vice-chair of the IFIP WG10.5 and he is Chair of IFIP TC10. He also started with the EMicro, an annually microelectronics school in South Brazil. In 2002 he received the Researcher of the Year Award in the state of Rio Grande do Sul. He is a founding member of the SBC (Brazilian Computer Society) and also founding member of SBMicro (Brazilian Microelectronics Society). He was member of CASS DLP Program (2014/2015), and he has done more than 70 invited talks in conferences. Member of IEEE CASS BoG and IEEE CEDA BoG. He is the CASS representative at the IEEE IoT TC. Ricardo received the IFIP Fellow Award in 2021 and the ACM/ISPD Lifetime Achievement Award in 2022. He received the 2023 IEEE CASS John Choma Educational Award.

Registration form: https://forms.gle/Gy8RXYAyQkmYb2Ak9

演講題目：FinFET Analog Cell Layout Guidelines

主講人：台積電 周文昇資深經理（Vincent Wen-Shen Chou）

• 日期：2025/6/27(星期五)
• 時間：下午1:30～3:30
• 地點：臺大電機二館106室
• 報名網址：https://forms.gle/6Z8gEmx1K8YFigjM6

Speaker Bio: Vincent Wen-Shen Chou was born in Taipei, Taiwan. He received the B.S. and M.S. degrees in Electrical Engineering Department from National Taiwan University, Taiwan in 1994 and 1996 respectively. He also received the Ph.D. degree from the Institute of Electronic Engineering, National Chiao Tung University, Taiwan. From 2003 to 2016, he was engaged in Mixed-Signal design in TSMC Design and Technology Platform. His research interests include High-Speed Digital-to-Analog Converter, Power Management Integrated Circuit and Mixed-Signal circuit designs. From 2017, he leads a team to develop tsmc Analog Cell Design and Technology Co-Optimization (DTCO) with related design flow. TSMC introduced silicon-proven Analog Cells in 2018 at the N5 node, now offered for all FinFET nodes with successful customer adoptions. His recent research focuses on Analog Design Automation and Advanced Technology Analog Cell DTCO.

Abstract: Starting from FinFET technology introduction: including basic FinFET architecture, key features vs planar MOS, and some basic process flow, e.g. self-align and double patterning. Then we will cover some key Analog Design and Layout Guidelines for FinFET technologies, e.g. 4-fin grid rules for mismatch. Next will introduce the analog cells and DTCO with their impacts on Advanced Node CMOS Analog/Mixed-Signal Circuits. Analog Cell DTCO achieves better PPA, smaller S2S gap, ~10% analog IP area shrinkage, and ~50% layout effort reduction. It improves the node-to-node analog migration with 2X productivity and enables the analog design automation through the ADM flow and supporting utilities.

【主辦單位】教育部先進製程IC設計及驗證環境建置計畫

　　　　　　國科會高效能晶片關鍵技術與創新應用計畫-應用於先進封裝之高效能晶片間互聯傳收機

【協辦單位】臺灣大學電子工程學研究所

- Title: Publish or Perish? A Rookie Scholar's Guide to Graduate School
- Abstract:
Navigating graduate school, especially at the doctoral level, can be challenging.
This talk aims to present essential mindsets and practical strategies that may help new graduate students.

I will begin by highlighting the importance of passion, a critical ingredient for sustained academic achievement.
I will introduce my research interests in formal methods,
an area deeply rooted in logic, automata theory, and constraint solving,
and their applications in ensuring the correctness of computing systems with mathematical rigor.

Next, I will reflect on the well-known aphorism "Publish or Perish" and its implications for graduate students.
I will introduce peer-review processes and provide some tips on managing research projects and effectively writing papers.

Finally, drawing from my own experiences as a doctoral student at GIEE,
through my transition from Electronics Engineering to a PostDoc in Computer Science,
and eventually back as an Assistant Professor at NTU,
I will share valuable insights and lessons I wish I had known at the beginning of my doctoral study.

- Short bio:
Dr. Nian-Ze Lee is an Assistant Professor in the Department of Electrical Engineering at National Taiwan University (NTUEE),
a position he has held since February 2025.
He earned his Ph.D. in Electronics Engineering from NTU in 2021,
where he was selected as an honorary member of the Phi Tau Phi Scholastic Honor Society.
His dissertation on stochastic Boolean satisfiability received the prestigious Lam Research Thesis Award.
During his doctoral study, he had internship and exchange experiences at
IBM Thomas J. Watson Research Center, New York, USA, National Institute of Informatics, Tokyo, Japan, and LMU Munich, Munich, Germany.
From 2021 to 2024, Dr. Lee was a Postdoctoral Researcher at LMU Munich,
focusing on formal methods and their practical applications in software engineering and EDA.
His work has been recognized at top-tier international conferences and earned several awards,
including an ACM SIGSOFT Distinguished Paper Award and a Best Artifact Award at FSE 2024,
a Best Paper Award at SPIN 2024, and a Distinguished Artifact Award at TACAS 2024.
As of 2025, he leads multiple research projects as a principal investigator,
including a DFG-funded research project and an Intel-funded collaboration.

知識力激發你的創造力：如何善用資源突破創新？

➩ 如何在求學時突破創新？
➩ 如何在實驗時突破創新？
➩ 如何在工作上突破創新？
➩ 如何在思維上突破創新？
➩ 如何在創業中突破創新？
➩ 如何善用資源突破創新？

摘要：三部曲

第一部曲：(本演講)處理未知解、不知解

離心力(向AI沿曲線、螺旋線靠攏)，Entropy (熵) à最大亂度，Value Up

借力使力、舉一反三，

年輕人競爭力：直線、曲線、螺旋線

第二部曲：務實，處理已知解

向心力與萬有引力(向AI沿直線靠攏)，最低能量，Cost Down

第三部曲：需要重新審視「人文、社會科學」的新時代內涵

   本演講將介紹腦中風的臨床診斷與治療發展，並回顧過去二十年在台大醫院建立腦血管實驗室的歷程，如何開展結合臨床與轉譯研究的腦中風相關工作。演講亦將分享幾年前與台大電機合作，推動神經生理監測技術於臨床應用的經驗，透過連續性生理參數的分析，提升急性腦中風治療決策與預後評估的精準度。此外，我們團隊近年亦致力於基因性小血管疾病致病機轉的探討，結合臨床觀察與基礎研究成果，開啟轉譯醫學的新篇章，並期待未來的共同合作契機。

​報名網址：https://reurl.cc/bW9VdM​