得獎者論文名稱論文發表處指導教授
呂祐昇WB-Trees: A Meshed Tree Representation for FinFET Analog Layout DesignsDAC 2018張耀文
張鶴騰Cost-Aware Patch Generation for Multi-Target Function Rectification in Engineering Change OrderDAC 2018江介宏
王于哲A 12.6mW 573-2,901KS/s Reconfigurable Processor for Reconstruction of Compressively-Sensed Physiological SignalsSymposium on VLSI Circuits 2018楊家驤
黃碩安A 1.9mW SVM Processor with On-chip Active Learning for Epileptic Seizure ControlSymposium on VLSI Circuits 2018楊家驤
顏智洋Comprehensive Thermal SPICE Modeling of FinFETs and BEOL with Layout Flexibility Considering Frequency Dependent Thermal Time Constant, 3D Heat Flows, Boundary/Alloy Scattering, and Interfacial Thermal Resistance with Circuit Level Reliability EvaluationSymposium on VLSI Technology 2018劉致為
