• Access IC Lab Receives Best Paper Award at 2017 VLSI-DAT The Access IC Lab of Graduate Institute of Electronics Engineering (GIEE) at National Taiwan University (NTU), guided by Prof. An-Yeu (Andy) Wu, recently received the 2017 IEEE International Symposium on VLSI Design, Automation & Test (VLSI-DAT) Best Paper Award. An-Yeu (Andy) Wu, the professor of NTU GIEE, works together with MS. student Chia-Heng Wu, PhD student, Ting-Sheng Chen, Ding-Yuan Lee, and the assistant professor Tsung-Te Liu to made advances toward a real time learning and classification system. The awarded paper titled “Low-Latency Voltage-Racing Winner-Take-All (VR-WTA) Circuit for Acceleration of Learning Engine” was selected among 34 accepted technical papers presented in 2017 IEEE VLSI-DAT. It demonstrates the leading role as well as the research capability of NTU in the state-of-the-art field of hardware acceleration for machine learning engine.

    IEEE International Symposium on VLSI-DAT

    The International Symposium on VLSI-DAT is one of the international conference on advanced semiconductor technology. The 2017 VLSI-DAT has a very high-quality program featuring three joint plenary sessions and 2 joint invited sessions (Held with VLSI-TSA together). Specifically, the 2017 VLSI-DAT technical sessions including 3 plenary talks, 2 industrial sessions, 2 special sessions, 3 parallel tutorials and regular paper presentations, and 15 oral sessions. Around 1000 members from the academic, industry, and industrial research center are invited to attend the 2017 VLSI-DAT to share their view on the future technology trends and publish papers about their research results. This year, tens of papers, from the U.S., Japan, France, Singapore, U.K., Germany, Switzerland, Netherland, Belgium, and China, were presented at the VLSI-DAT. The presented papers were called in an open-solicitation process and selected from all of submitted papers through blind-review process. The best paper award at the 2017 VLSI-DAT is selected among the 34 presented papers by the evaluations of the committee. The selection criteria of the award include the technical contents and writing quality of the paper as well as the quality of the presentation at the symposium. Access IC Lab’s best paper award at the 2017 VLSI-DAT demonstrates a new mechanism to improve the performance of real time classification for neural network computation, bridging the performance gap between existed and the future field of artificial intelligence.

    Low-Latency Voltage-Racing Winner-Take-All (VR-WTA) Circuit for Acceleration of Learning Engine

    With the development of machine learning, deep learning, real time classification and learning has gradually become a major issue. In recent years, many of the neural network hardware acceleration design were proposed, using analog and digital approach to design hardware architecture, but cannot achieve high throughput, low latency, and high resolution simultaneously. Low latency voltage racing winner-take-all circuit takes the advantages of the above two approaches to solve the bottleneck of the real time learning and classification operation. This architecture can assist the parallel comparison of neural networks. a substantial increase in the speed of operation to meet the requirement of real-time learning and classification. In addition, the power consumption is also an important consideration for the design of machine learning system. The proposed architecture terminates the loser at early stage thus ease the burden of system power consumptions.

    Membership Status

    The authors of this work including Prof. An-Yeu(Andy) Wu, Prof. Tsung-Te Liu, Ph.D. student Ting-Sheng Chen, Ding-Yuang Lee, and graduate student Chia-heng Wu. Professor Wu and Prof. Liu graduated from the Department of Electrical Engineering in 1987 and 2002, respectively. Now both of them are professor of Electrical Engineering, NTU. Ting-Shen Chen and Din-Yuang Lee are Ph.D. student. Chia-Heng Wu receive master degree from Graduate Institute of Electronics Engineering in July, 2017.
  • Teams from National Taiwan University and National Tsing Hua University develop a world-leading light-field chip for photography. Specially tailored for future mobile applications! Research team of Prof. Liang-Gee Chen from GIEE and research team of Prof. Chao-Tsung Huang from National Tsing Hua University cooperate to develop a video processing chip that supports input of video-rate light field with five viewing angles and generates a high-definition depth map of the viewing scene. With more viewing angles, the accuracy of the depth map is enhanced. The power consumption is less than current available technology thus is more suitable for the applications of mobile devices. Users can freely adjust the focusing spots and the depth-of-field of the recorded video by post processing in the future.
  • A 16-core mobile GPU with power-aware approximation techniques developed by Prof. Shao-Yi Chien's group won the Diamond Award of the 14th Golden Silicon Competition held by Macronix. A 16-core mobile GPU with power-aware approximation techniques developed by Prof. Shao-Yi Chien's group won the Diamond Award (the biggest prize) of the 14th Golden Silicon Competition held by Macronix. The team led by Yu-Jung Chen, with the team members Chia-Ming Chang and Chen-Yu Yen, spent about one year and a half to realize the design. Nowadays, graphics computing on mobile devices is indispensable. However, it drains significant power consumption on processing graphics applications and reduces the usage time. To save power, the purpose of the graphics processor design is to approximate visual quality to lower the power consumption without disturbing the user experiences and extend the usage time. This novel idea was appreciated by the committee members and awarded as the best design.
  • A fully integrated analog front end circuit, wireless transceiver, and DSP for ECG monitoring SOC developed by Prof. Tsung-Hsien Lin's group was awarded the third Prize at the 14th Golden Silicon Competition held by Macronix. A student team from National Taiwan University has designed “A fully integrated analog front end circuit, wireless transceiver, and DSP for ECG monitoring SOC” that is capable of medical telehealth caring. The design was awarded the Third Prize at the 14th Golden Silicon Awards held by Macronix on July 11 in Taiwan. The team members include Professor Tsung-Hsien Lin (NTU), Professor Hsi-Pin Ma (NTHU), Yi-Lin Tsai (NTU), Bang-Cyuan Wang (NTU), Chi-Chan Tu (NTU), and Yi-Hsuan Liu (NTHU). The president of Macronix stressed “innovation is the key to be eminent above all others.” As the population is ageing in our society, the tendency in the world is developing convenient and safe medical electric equipment. “A fully integrated analog front end circuit, wireless transceiver, and DSP for ECG monitoring SOC” integrates ECG real time monitoring system with wireless transceiver, patients stay home and the bioelectronic equipment monitors their physical conditions, then the amplified sensing-signals transfer to remote hospital via wireless transmission system on time and immediately. The doctors in the hospital can discover any abnormal physical situation and take emergency treatment.
Prof. An-Yu (Andy) Wu receive 2019 ECE Distinguished Alumni Award from Department of Electrical & Computer Engineering, University of Maryland.
 2019-03-04
Prof. Yao-Wen Chang and his team won the 3rd Place at the 2018 ACM ISPD Initial Detailed Routing Contest.
 2018-05-09
Prof. Tei-Wei Kuo received 2017 Outstanding Technical Achievement and Leadership Award from IEEE Technical Committee on Real-Time Systems (TCRTS).
 2018-01-04
Prof. Cheewee Liu and Prof. Yi-Jan Chen were elevated to IEEE Fellow, effective 1 January 2018.
 2017-11-21
Prof. Yao-Wen Chang is elected as President-Elect of CEDA for 2018-2019, and President of CEDA for 2020-2021.
 2017-11-16
Prof. Yao-Wen Chang received Best Paper Award at the 54th ACM/IEEE Design Automation Conference (DAC 2017).

Paper title: Toward Optimal Legalization for Mixed-Cell-Height Circuit Designs.

 

 2017-06-26
Chai-Heng Wu, Ting-Sheng Chen, Ding-Yuan Lee, Prof. Tsung-Te Liu, and Prof. An-Yeu Wu receive Best Paper Award from 2017 International Symposium on VLSI Design, Automation and Test (2017 VLSI-DAT).

Chai-Heng Wu, Ting-Sheng Chen, Ding-Yuan Lee, Prof. Tsung-Te Liu, and Prof. An-Yeu Wu receive Best Paper Award from 2017 International Symposium on VLSI Design, Automation and Test (2017 VLSI-DAT)  with paper entitled: “Low-Latency Voltage-Racing Winner-Take-All (VR-WTA) Circuit for Acceleration of Learning Engine.”

 2017-06-23
PhD student, Hsuan-An Chen(instructed by Prof. Shih-Yen Lin) won best PhD student poster contribution award in Graphene 2017.
 2017-05-03
Prof. Jenn-Gwo Hwu and Prof. Ching-Fuh Lin won 2016 MOST Outstanding Research Award.
 2017-04-07
B.-Q. Lin, T.-C. Lin, and Y.-W. Chang won the Best Feature Paper Award at 2016 VLSI Design/CAD Symposium. (Paper title: An effective RDL routing algorithm for the InFO WLCSP technology)
 2017-02-15
Yi-Chung Wu, a PhD student instructed by Prof. Chia-Hsiang Yang won the 2017 ISSCC Silkroad Award.
 2017-02-07
Prof. Liang-Gee Chen was elected as 2016 NAI Fellow. (NAI: National Academy of Inventors)
 2016-12-05
Dr. Young-Kai Chen, Distinguished Chair Professor, has been elected as 2016 Academicians.
 2016-07-07
Prof. Chenming Hu was awarded 2016 National Medal of Technology and Innovation.
 2016-05-27
Prof. An-Yeu (Andy) Wu won 2016 Y. Z. Hsu Scientific Award - Technology Invention Award.
 2016-05-16
Prof. Si-Chen Lee was appointed as 2016 Macronix International Co., Ltd Chair Professor.
 2016-04-14
Prof. Chihwei Liu won 2015 MOST Outstanding Research Award.
 2016-03-15
Prof. Tsung-Hsien Lin won 2015 ISSCC Evening Session Award.
 2016-03-01
The students team (Jiachen Liu, Hung-Yi Cheng, Ching-Chun Liao) instructed by Prof. An-Yeu (Andy) Wu won the Best Student Paper Award in 2015 IEEE International Workshop on Signal Processing Systems (SiPS’15).
 2015-12-25
Prof. Yao-Wen Chang has been elected as VP of 2016-2017 IEEE CEDA. He has also served as the program chair on the CEDA Executive Committee and Board of Govornors.
 2015-12-17
Prof. Tei-Wei Kuo is elevated to 2015 ACM Fellow: For Contributions to Performance and Reliability Enhancement of Flash-Memory Storage Systems.
 2015-12-09
Prof. Yao-Wen Chang received IEEE Council on EDA (CEDA) Outstanding Service Award from ICCAD for outstanding service to the EDA community as ICCAD General Chair in 2014.
 2015-11-10
The students team (Min-Jen Yang and Li-Wei Wang) instructed by Prof. Chung-Yang Huang won the 1st place at the 2015 Synopsys APPs Design Contest. Prof. Chung-Yang Huang also won the Best Instructor Award.
 2015-11-06
The students team (Min-Jen Yang and Li-Wei Wang) instructed by Prof. Chung-Yang Huang won the 1st place at the 2015 CADathlon Contest @ ICCAD!!
 2015-11-06
The students team (Ming-Jen Yang, Li-Wei Wang, Kuan-Yu Lin and Yi-Hong Lu) instructed by Prof. Chung-Yang Huang won the 2hd place at 2015 CAD Contest @ ICCAD.
 2015-11-06
Prof. An-Yeu Wu was elected as a 2016-2018 IEEE CASS BoG(Board of Governors) Member.
 2015-10-23
The placer "NTUplace4dr" developed by Prof. Yao-Wen Chang, students Chau-Chin Huang, Bo-Qiao Lin, Shen-Wei Yang, Szu-To Chen, Chin-Hao Chang, and research assistant Hsin-Ying Lee won the 1st place in the 2015 ACM ISPD Placement Contest.
 2015-04-01
Prof. Shen-Iuan Liu received National Science Council’s “2014 Outstanding Research Award.”
 2015-03-26
Prof. James B. Kuo and Prof. Liang-Gee Chen received National Science Council’s “2014 Outstanding Special Researcher Award.”
 2015-03-24
Prof. Tzi-Dar Chiueh and co-workers received the silver medal of “2014 National Invention and Creation Award.”
 2015-03-24
Breaking News: IEEE ISSCC 2015 A Smart CMOS Assay SoC for Rapid Blood Screening Test of Risk Prediction
National Taiwan University, National Taiwan University Hospital, and Chang Gung University present a 9mm2, 3V, 2.7mW, 0.35μm CMOS SoC for blood screening immunoassay. The SoC micro-controller unit assists blood filtration through a nanoporous aluminium oxide membrane, biomolecular conjugation with antibodies attached to magnetic beads, electrolytic pumping, magnetic flushing and threshold detection based on Hall sensor array read-out analysis.
 2015-02-25
Research on junctionless Ge gate-all-around nFETs by prof. Chee-Wee Liu's group has been published in 2014 IEDM
Research on junctionless Ge gate-all-around nFETs by prof. Chee-Wee Liu's group has been published in 2014 IEDM. The paper in title of “In-situ Doped and Tensily Stained Ge Junctionless Gate-all-around nFETs on SOI Featuring Ion = 828 μA/μm, Ion/Ioff ~ 1E5, DIBL= 16-54 mV/V, and 1.4X External Strain Enhancement” is presented by I-Hsieh Wong. In-situ CVD doping and laser anneal can reach [P] and tensile strain as high as 2E20 cm-3 and 0.34%, respectively, in Ge on SOI with low defect density and high activation rate (nearly 100% near the surface), and enables high performance of the junctionless (JL) Ge gate-all-around (GAA) nFETs. The device with the Wfin of 13 nm, EOT of 10 nm, and nominal LG of 280 nm has Ion = 350 μA/μm, Ion/Ioff = 3E6, SS = 185 mV/dec, and DIBL = 16 mV/V. The device with the Wfin of 9 nm and EOT of ~ 0.8 nm achieves the record high Ion of 828 μA/μm at VGS - VT = 1.5 V and VDS = 2 V with DIBL = 54 mV/V, Ion/Ioff = 1E5 and SS = 150 mV/dec. Besides the epitaxial tensi
 2014-12-16
Prof. An-Yeu Wu was elevated to IEEE Fellow, effective 1 January 2015.
 2014-11-25
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